1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to an internal voltage generating circuit for receiving an external voltage having a predetermined level and converting the external voltage into an internal voltage to supply power to peripheral circuits of banks, a semiconductor memory device having the internal voltage generating circuit, and a method for generating an internal voltage.
2. Description of the Related Art
Recently, an internal voltage generating circuit for maintaining an internal power voltage at a predetermined level independent of an external power voltage has been used in semiconductor memory devices operating in the region of 3V to 6V to improve properties such as high-speed operation and low operating current. With the increased operating current drawn by semiconductor products that are designed to operate at a low supply voltage of 3.3V using an external voltage (EVC), semiconductor products solving these problems using an internal voltage generating circuit have been favored.
In a memory circuit, the internal voltage generating circuit includes an internal voltage generating circuit for the memory array and an internal voltage generating circuit for the peripheral circuits.
The internal voltage generating circuit for the memory array supplies a predetermined voltage required for storing data in a memory array bank or for reading data from the memory array bank.
The internal voltage generating circuit for the peripheral circuits supplies a predetermined voltage required for operating peripheral circuits of banks (but not the memory array bank): for example, decoders, input buffers, output buffers, and input and output lines. The internal voltage generating circuit for the peripheral circuits includes: a standby internal voltage generating circuit that operates continually after power is turned on; and an active internal voltage generating circuit that operates only when a memory bank is enabled.
In prior art peripheral-circuit internal voltage generator implementations, an internal voltage has been supplied to the peripheral circuits independent of memory bank operation the state of the internal voltage generator has been classified only into an active state and a standby state. It is recognized herein that problems can arise with such implementations, problems such as power being supplied when the peripheral circuits are not needed, or insufficient power being supplied at other times.